1. Field of the Invention
The present invention relates to an image capturing system having a configuration wherein a camera unit and a main unit are separate, capable of serial communication between the camera unit and the main unit, and to a control method of the image capturing system.
2. Description of the Related Art
In general, conventional image capturing systems (e.g., separate head type image capturing systems) where the camera unit and the main unit are separated, as disclosed in Japanese Patent Laid-Open No. 10-42176, are arranged (digital data separation type) such that the camera unit comprises a portion which handles the image capture process up to immediately before AD conversion output from a CCD. The camera unit is connected by a cable to the main unit, which performs AD conversion on the output from the CCD. Accordingly, in the event that a user wants to extend the distance between the camera unit and the main unit, a system using a method known as Low Voltage Differential Signaling (LVDS), or IEEE1394, or the like has been used (see Japanese Patent Laid-Open No. 9-181936). An image data transmitting/receiving system for transferring AD-converted digital data using the differential serial method has been also proposed (Japanese Patent Laid-Open No. 2000-333081). Furthermore, as an international digital video data serial output standard, SMPTE292M/259M or TIA/EIA-644 has been employed for image transfer in monitor cameras, PC cameras, and the like.
FIG. 10 is a block diagram illustrating the schematic configuration of a digital camera having a digital data separation-type image capturing system according to a conventional example.
Referring to FIG. 10, reference numeral 1000 denotes a camera unit, 1001 denotes a lens group for inputting an image into a CCD 1002 which is a CCD equivalent to 300,000 through 330,000 pixels for converting an image input from the lens group 1001 into electrical signals. Reference numeral 1003 denotes a CDS/AGC for performing gain adjustment of analog signals output from the CCD 1002, reference numeral 1004 denotes a timing generator (TG in FIG. 10) for outputting a timing signal for driving the CCD 1002, reference numeral 1005 denotes an AD converter (AD in FIG. 10) for converting an output signal from the CDS/AGC 1003 into 12-bit parallel digital data in sync with the timing to be output from the timing generator 1004, and reference numeral 1006 denotes an oscillator for supplying a reference clock for driving the CCD 1002 as to the timing generator 1004. Reference numeral 1006 also denotes a clock serving as the source of an image data sampling signal for a LVDS 1007, which samples 12-bit digital data to be output from the AD 1005 to Phase Lock Loop (PLL) 1008. Transmission-side LVDS 1007 converts digital data converted by the AD converter 1005, a VD (vertical synchronization) signal, and an HD (horizontal synchronization) signal generated by the timing generator 1004 into serial data using the image data sampling signal supplied from PLL 1008, and outputs the serial data to main unit 1020. PLL 1008 generates the image data sampling signal by a clock outputted from the oscillator 1006. Reference numeral 1009 denotes a cable for connecting LVDS 1007 of the camera unit 1000 side with LVDS 1027 of the main unit 1020 side.
Main unit 1020 performs a series of actions as a digital camera, such as displaying image data transmitted from the camera unit 1000, compressing the image data in a JPEG format, and storing the data on a Compact Flash® (CF) card 1025 serving as external storing means as a still image. Reference numeral 1021 denotes a digital camera function IC for performing the above processing of the main unit 1020. Reference numeral 1022 denotes work memory serving as a work region for the digital camera function IC 1021 developing or compressing image data, while reference numeral 1023 denotes program memory storing a program for operating the digital camera function IC 1021. Reference numeral 1024 denotes a liquid crystal display unit to be used for displaying a finder image and confirming an image being shot, reference numeral 1026 denotes a key switch (key SW) unit serving as an interface for performing various types of digital camera operations by an operator, and reference number 1027 denotes a reception-side LVDS circuit for receiving a differential serial signal to be output from the LVDS 1007 of the camera unit 1000 and converting the received data into a reproduced image data sampling signal using the original 12-bit parallel digital data, VD and HD signals, and a clock recovery function within the LVDS. Reference numeral 1030 denotes a power supply unit for supplying a power to the entire system.
With a conventional system example having the configuration illustrated in FIG. 10, the camera unit 1000 transmits image data of 640×480 pixels (VGA size) or 720×480 pixels or so to the main unit 1020 30 times per second, and the main unit 1020 outputs the received image data to the liquid crystal display unit 1024. However, all that the image capturing system, comprising the separate camera unit and the separate main unit where the separate camera unit and separate main unit are connected via a serial signal, can perform is to simply output image data to be output from the camera unit to the display unit of the main unit, or to compress part or all an image to be output to the display unit in a JPEG format.
Thus, a signal related to processing, such as focus control, zoom control, and further various-types sensor control, is not included in signals to be transmitted from the camera unit to the main unit. It is impossible to perform fine operations related to image operations by the operator.
In addition, with still image capturing, in the event that a high-pixel CCD of 2 or 5 million pixels, for example, is employed, there is the need to perform gain control with a fine CDS/AGC for improving image quality, mechanical shutter driving, and focus motor driving. However, with conventional systems, it is impossible to transmit/receive signals other than image data related signals (e.g., 12-bit digital image data, VD signal, HD signal, and image data sampling signal). Accordingly, it is also impossible to perform still image capturing using a high pixel CCD.
Since the reference clock of the camera unit and that of the main unit are not synchronized, there is also the need to perform synchronous processing using software or hardware at the time of displaying an image of the camera unit on the liquid crystal display unit. Even if the camera unit and the main unit include an oscillator respectively so as to operate in the same frequency, it is impractical that the two oscillators have completely the same frequency, and consequently, synchronous processing needs to be performed.